Navitas tightens SiC losses with refined TAP
• Navitas Semiconductor has announced its 5th-generation GeneSiC platform featuring high-voltage trench-assisted planar (TAP) SiC MOSFETs, describing it as a significant advancemen
• Navitas Semiconductor has announced its 5th-generation GeneSiC platform featuring high-voltage trench-assisted planar (TAP) SiC MOSFETs, describing it as a significant advancemen
• Computer Science > Networking and Internet Architecture [Submitted on 12 Nov 2025 (v1), last revised 17 Feb 2026 (this version, v2)] Title:Refined Bayesian Optimization for Effic