• The W3510E workflow targets pre-layout modeling, EM analysis, and early UCIe and BoW validation for advanced AI infrastructure designs. • The W3510E workflow targets pre-layout modeling, EM analysis, and early UCIe and BoW validation for advanced AI infrastructure designs.

Article Summaries:

  • Keysight has unveiled its new 3D Interconnect Designer, a software suite aimed at accelerating the design of chiplet‑based and 3D integrated circuit (3DIC) systems. The W3510E workflow focuses on pre‑layout modeling, enabling designers to simulate interconnect behavior before physical implementation. It also incorporates electromagnetic (EM) analysis to predict signal integrity and power‑delivery issues early in the design cycle. Additionally, the tool supports early validation of UCIe (Unified Chiplet Interconnect Express) and BoW (Back‑to‑Back) interfaces, which are critical for AI‑centric infrastructure. The release is positioned to streamline development of high‑performance AI platforms by reducing time‑to‑market and improving design reliability.
  • The W3510E workflow targets pre-layout modeling, EM analysis, and early UCIe and BoW validation for advanced AI infrastructure designs.

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