https://cluster-site.onrender.com/tags/risc-v/ Recent content in Risc-V on Tenu Tech Brief Hugo -- 0.146.0 en-us Wed, 25 Feb 2026 21:40:10 +0000 https://cluster-site.onrender.com/posts/cancelled-risc-v-llvm-sync-up-call-february-26th-2026/ Wed, 25 Feb 2026 20:39:31 +0000 https://cluster-site.onrender.com/posts/cancelled-risc-v-llvm-sync-up-call-february-26th-2026/ • LLVM Discussion Forums CANCELLED RISC-V LLVM sync-up call February 26th 2026 Code Generation RISCV asb February 25, 2026, 8:39pm 1 We’ll skip tomorrow’s meeting due to lack of ag https://cluster-site.onrender.com/posts/telink-ml9118a-a-32-bit-risc-v-iot-module-with-wi-fi-6-bluetooth-5.4-and-802.15.4-connectivity/ Wed, 25 Feb 2026 14:23:22 +0000 https://cluster-site.onrender.com/posts/telink-ml9118a-a-32-bit-risc-v-iot-module-with-wi-fi-6-bluetooth-5.4-and-802.15.4-connectivity/ • Telink ML9118A is a wireless IoT module with Wi-Fi 6, Bluetooth 5 • 4 (Zigbee/Thread/Matter) connectivity designed for smart home, smart lighting, and smart remote control applic https://cluster-site.onrender.com/posts/reviewer-coverage-for-lldb-risc-v-prs/ Mon, 23 Feb 2026 11:52:41 +0000 https://cluster-site.onrender.com/posts/reviewer-coverage-for-lldb-risc-v-prs/ • Reviewer Coverage for LLDB RISC-V PRs First I need to make folks aware that while I was previously assigned to Linaro, I am now back at Arm. • To you in the community that is jus https://cluster-site.onrender.com/posts/reviewer-coverage-for-lldb-risc-v-prs/ Mon, 23 Feb 2026 11:52:41 +0000 https://cluster-site.onrender.com/posts/reviewer-coverage-for-lldb-risc-v-prs/ • Reviewer Coverage for LLDB RISC-V PRs First I need to make folks aware that while I was previously assigned to Linaro, I am now back at Arm. • To you in the community that is jus https://cluster-site.onrender.com/posts/ai-is-stress-testing-processor-architectures-and-risc-v-fits-the-moment/ Thu, 19 Feb 2026 07:17:49 +0000 https://cluster-site.onrender.com/posts/ai-is-stress-testing-processor-architectures-and-risc-v-fits-the-moment/ • Every major computing era has been defined not by technology, but by a dominant workload-and by how well processor architectures adapted to it. • The personal computer era reward https://cluster-site.onrender.com/posts/sifives-ais-next-chapter-risc-v-and-custom-silicon/ Wed, 18 Feb 2026 22:00:31 +0000 https://cluster-site.onrender.com/posts/sifives-ais-next-chapter-risc-v-and-custom-silicon/ • In the rapidly evolving world of artificial intelligence and semiconductor design, open-standard processor architectures are gaining unprecedented traction. • At the center of th https://cluster-site.onrender.com/posts/loongarch-ready-with-new-features-in-linux-7.0/ Wed, 18 Feb 2026 13:16:00 +0000 https://cluster-site.onrender.com/posts/loongarch-ready-with-new-features-in-linux-7.0/ • Linux 7.0 adds SMT hot-plug support for LoongArch, boosting multi-threading flexibility. • 128‑bit atomic CMPXCHG instructions now supported, enhancing concurrency primitives for https://cluster-site.onrender.com/posts/detecting-architectural-vulnerabilities-in-closed-source-risc-v-cpus-cispa/ Tue, 17 Feb 2026 16:45:08 +0000 https://cluster-site.onrender.com/posts/detecting-architectural-vulnerabilities-in-closed-source-risc-v-cpus-cispa/ • Home Systems & Design Low Power - High Performance Manufacturing, Packaging & Materials Test, Measurement & Analytics Auto, Security & Enabling Technologies Special Reports Busin https://cluster-site.onrender.com/posts/risc-v-in-linux-7.0-brings-user-space-cfi-optimized-strlen-assembly/ Mon, 16 Feb 2026 19:05:45 +0000 https://cluster-site.onrender.com/posts/risc-v-in-linux-7.0-brings-user-space-cfi-optimized-strlen-assembly/ • RISC-V In Linux 7.0 Brings User-Space CFI & Optimized strlen Assembly The RISC-V architecture updates have been merged for Linux 7.0 with a few items to note. • First up, RISC-V https://cluster-site.onrender.com/posts/risc-v-mentorship-taught-me-the-risc-v-isa-is-far-more-than-a-reference-manual/ Tue, 10 Feb 2026 17:24:47 +0000 https://cluster-site.onrender.com/posts/risc-v-mentorship-taught-me-the-risc-v-isa-is-far-more-than-a-reference-manual/ • When I first heard about the RISC-V Unified Database project, I was immediately drawn to its ambition: to become a single, machine-readable source of truth for the RISC-V Instruc https://cluster-site.onrender.com/posts/start-porting-software-to-risc-v-today-with-our-new-free-online-course/ Thu, 29 Jan 2026 08:36:47 +0000 https://cluster-site.onrender.com/posts/start-porting-software-to-risc-v-today-with-our-new-free-online-course/ • Extend Your Architecture-Level Porting Skills Into RISC-V with this new course from RISC-V International and Linux Foundation Education We’ve teamed up with the Linux Foundation https://cluster-site.onrender.com/posts/how-were-using-ai-to-streamline-risc-v-regression-debugging/ Tue, 27 Jan 2026 10:38:45 +0000 https://cluster-site.onrender.com/posts/how-were-using-ai-to-streamline-risc-v-regression-debugging/ • AI-powered Verifaix Debug Agent automates root‑cause analysis for thousands of regression test failures. • Maintains regression suites by automatically determining if failures st https://cluster-site.onrender.com/posts/one-isa-infinite-use-cases-risc-v-and-the-road-to-workload-specific-silicon/ Wed, 21 Jan 2026 19:44:28 +0000 https://cluster-site.onrender.com/posts/one-isa-infinite-use-cases-risc-v-and-the-road-to-workload-specific-silicon/ • RISC‑V’s 2025 Annual Report highlights rapid ecosystem growth and industry adoption. • Krste Asanović, co‑creator, emphasizes RISC‑V’s transition from generic to workload‑specifi https://cluster-site.onrender.com/posts/announcing-the-2025-ai-risc-v-gemini-credit-recipients/ Thu, 18 Dec 2025 16:22:08 +0000 https://cluster-site.onrender.com/posts/announcing-the-2025-ai-risc-v-gemini-credit-recipients/ • RISC-V International StaffRISC-V International’s staff bring together expertise from multiple disciplines to advance our mission of promoting the RISC-V instruction set architect https://cluster-site.onrender.com/posts/the-final-verification-frontier-how-breker-battle-hardened-risc-v-for-space/ Tue, 09 Dec 2025 13:35:51 +0000 https://cluster-site.onrender.com/posts/the-final-verification-frontier-how-breker-battle-hardened-risc-v-for-space/ • It’s been an interesting few weeks for anyone studying how cosmic radiation and solar activity affect safety-critical electronics. • We saw Airbus order the grounding of around 6 https://cluster-site.onrender.com/posts/notes-from-the-2025-risc-v-industry-development-conference/ Fri, 05 Dec 2025 13:05:49 +0000 https://cluster-site.onrender.com/posts/notes-from-the-2025-risc-v-industry-development-conference/ • Eudora ZhuRVEI International Cooperation DepartmentEudora collaborates with members within RVEI (RISC-V Ecosystem & Industry), a non-profit organization established in 2023 to sp https://cluster-site.onrender.com/posts/september-update-check-your-notes/ Wed, 02 Oct 2024 00:00:00 +0000 https://cluster-site.onrender.com/posts/september-update-check-your-notes/ • Pine64 community pushes new hardware, reviving older products, thanks for patience. • RISC‑V focus continues, Star64 paved way, now StarPro64 arrives. • StarPro64 features upgrad https://cluster-site.onrender.com/posts/pinetab-v-and-pinetab2-launch/ Mon, 10 Apr 2023 00:00:00 +0000 https://cluster-site.onrender.com/posts/pinetab-v-and-pinetab2-launch/ • Pre‑orders for PineTab2 & PineTab‑V launch April 13, priced at $159. • 10.1″ 1200×800 IPS LCD, metal chassis, dual USB‑C, digital video out, 6000 mAh battery. • Detachable backli https://cluster-site.onrender.com/posts/october-update-an-ox-no-bull/ Sat, 15 Oct 2022 00:00:00 +0000 https://cluster-site.onrender.com/posts/october-update-an-ox-no-bull/ • Ox64: $8 RISC‑V SBC, Linux‑ready, under $10 price point, new entry for makers. • Star64 now boots Linux, GPU works, but USB‑3.0, Wi‑Fi, Ethernet still need fixes. • QuartzPro64 a