ElastixAI Emerges From Stealth With FPGA Approach to Gen AI Supercomputing

• In this exclusive interview, the Seattle startup says its software-ML-hardware co-design-announced today-converts off-the-shelf FPGA servers into high-efficiency AI inference eng

Electronics & EE · February 25, 2026 (updated February 25, 2026) · 1 min · 52 words
AMD VEK385 Versal AI Edge Gen 2 FPGA evaluation kit plugs directly into a PCIe Gen5/Gen4 slot

AMD VEK385 Versal AI Edge Gen 2 FPGA evaluation kit plugs directly into a PCIe Gen5/Gen4 slot

• AMD has introduced theVEK385 Evaluation Kitbuilt around the Versal AI Edge Gen 2 XC2VE3858 SoC FPGA, which combines eight Cortex-A78AE cores, ten Cortex-R52 cores, FPGA fabric wi

Open Hardware · February 23, 2026 (updated February 25, 2026) · 3 min · 528 words
OpenRISC With Linux 7.0 Improves Out-Of-The-Box Support For More FPGA Dev Boards

OpenRISC With Linux 7.0 Improves Out-Of-The-Box Support For More FPGA Dev Boards

• OpenRISC With Linux 7.0 Improves Out-Of-The-Box Support For More FPGA Dev Boards While the OpenRISC project began ten years before RISC-V was started, it hasn’t enjoyed the hardw

Linux & Open Source · February 16, 2026 (updated February 24, 2026) · 2 min · 263 words
xSDR - A tiny M.2 2230 SDR module with Artix-7 FPGA and LMS7002M RFIC (Crowdfunding)

xSDR - A tiny M.2 2230 SDR module with Artix-7 FPGA and LMS7002M RFIC (Crowdfunding)

• Wavelet Lab’s xSDR is a tiny, single-sided M.2 2230 software-defined radio (SDR) module designed for integration into laptops, embedded systems, and edge computing devices. • A s

Open Hardware · February 16, 2026 (updated February 24, 2026) · 3 min · 429 words
Automated MLIR-based HLS framework That Generates FPGA HW Designs From A Variety of CNN Layers (TU Dresden)

Automated MLIR-based HLS framework That Generates FPGA HW Designs From A Variety of CNN Layers (TU Dresden)

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